PRODUCT

OP-SB85L TTL/I2C/SPI Expansion Kit


Outline


OP-SB85L is the interface expansion kit that has a port to measure TTL / CMOS signal level communications, and the one to measure the voltage of high-speed analog input. The port for TTL / CMOS supports the measurement of TTL / CMOS level communications that power supply system is from 1.8V to 5V. It is suitable for monitoring the communication between the LSI and the interface IC on the printed circuit board by directly probing into the lines. It supports the protocol of not only UART and HDLC but also I2C and SPI on monitoring and simulating.
Furthermore, it has BURST measuring mode that captures data at all clock edges.

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Operating Instructions

Operating Instructions
After inserting the expansion board into an analyzer (LE-8200), connect the communication lines to measure, using the included probe pod. Since 9 kinds of signal lines can be tested, you can measure various communications: SD(SDA/SDO), RD(SDI), RTS(SS), CTS, EXIN, TXC(SCL/SCK), RXC, trigger input and trigger output. Moreover, you can set the polarity of data and the clock you wish to capture.

Monitor function

Normal mode (USART) allows to use all functions such as trigger function. BURST mode allows to measure clock SYNC which is not supported in former models. (Clock SYNC: clock is given only when transmitting data.) I2C mode allows to measure I2C serial communications with start/ stop sequence. I2C and SPI communications can be displayed in translation display and it is possible to analyze read and write sequence.
The timing of clock and data set at “CPOL” and “CPHA” is described in above figure.

The relation of input data and address is as follows.
e.g.) Input “123”;
[If 7 bit] “0010001” is set.
[If 10 bit] “0100100011” is set.
[ I2C Monitor ]
 [ SPI Monitor ]
Display Meaning
Time/
ΔTime		 It displays the time of receiving data./
It displays the difference of time. (Switchable by pressing [F5])
→ Indicates the transmission (write) from Master.
← Indicates the reception (read) from Master.
Adress/
Data		 Indicate the slave address and data in HEX.
[01] Indicates the non-acknowledge.
Display Meaning
Time/
ΔTime		 It displays the time of receiving data./
It displays the difference of time. (Switchable by pressing [F5])
Data It displays data in HEX.

Analog Waveform Analysis

It displays the waveforms at a sampling rate up to 40M for 2 channels and supports ±12V. This function helps to identify hardware problems. You can also use it for educational purpose for people studying data communications.

Simulation / Bert

Excepting the BURST mode, using the simulation function enables you to vastly enhance the efficiency of the development and the trouble analysis. In the I2C and SPI mode, you can simulate in both the master and the slave. Also, since the bit error rate test (BERT) is available in the normal mode (USART), you can easily test the transmission feature of the device, etc.

Specification

Analyzer LE-8200
Interface TTL / CMOS (for I2C and SPI)
Probe Signal SD (SDA/SDO) , RD (SDI) , RS (SS) , CS , EX IN , SD CLK (SCL/SCK) ,
RD CLK , Trigger IN , Trigger OUT (Length of lead:170mm)
Protocol ASYNC, ASYNC-PPP, SYNC(BSC), HDLC(SDLC), BURST, I2C, SPI
Test function Monitor / Simulation / BERT*1
Communication speed ASYN, ASYNC-PPP, SYNC, BURST : 50bps ~ 4Mbps*2
HDLC : 50bps to 4Mbps*2 on standard, 115.2Kbps to 12Mbps*3 on using OP-FW12G
SPI : 50bps to 2.15Mbps*4, 115.2Kbps to 20Mbps*5 on using OP-FW12G
I2C : max. 1Mbps (On simulation 50K, 100K, 200K, 384K, 417K, 1Mbps)
Signal level Selectable frm 5.0V/3.3V/2.5V/1.8V of power supply system
Input Impedance 100KO( 0V ≤ Vin ≤ 5V) (Acceptable Input range : -1V to +7V)
Input Level Threshold Setting of 5.0V High: Min 3.5V Low: Max 1.5V
Setting of 3.3V High: Min 2.0V Low: Max 0.8V
Setting of 2.5V High: Min 1.7V Low: Max 0.7V
Setting of 1.8V High: Min 1.2V Low: Max 0.6V
Output circuit The followings are selectable*6:
OC(Open collector)with the pull-up resister of 680O,
OC(Open collector)without pull-up resister,
Push-pull output of CMOS
Output Level Voltage High level : Min Selectable signal level - 0.4V Low level:Max 0.5V*7
Analog Input Input : 2 channels, IC clips
Sampling : 40Mbps ( 8 bits resolution )
Input Range : ±12V or ±6V selectable (Acceptable input voltage : ±25V)
Size and Weight Probe Pod body size : 78(W) × 92(D) × 22(H) Weight : about 100g
Relay cable length : 800mm
Power Supplied from the analyzer's body
Tenperature Operation:0 to 40°C Strage:-10 to 50°C
*1 In BURST(Mode for sampling data at all clock edges), only the monitor mode is supported. I2C and SPI do not have the BERT function.
*2 Applied in the half duplex. In the full duplex 2.15Mbps at Max.
*3 Applied in the half duplex. In the full duplex 6Mbps at Max.
*4 MAX 20Mbps(Monitor) or 4Mbps(Simulation), when the continuous transfer speed is within 1K bytes.
*5 Applied in the monitor mode with OP-FW12G(Version2.00 or later) . In the simulation mode, the speed is up to 12Mbps.
*6 Set from the analyzer. Outputting of CMOS is remcommended on simulation of which speed is more than 2Mbps.
*7 Applied when the current is 4 mA.