OP-SB5GL TTL/I2C/SPI* Expansion Kit
Applicable Analyzers: LE-3500/LE-2500
* SPI communications is only supported by LE-3500 (V1.03 or later).
Outline

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Furthermore, it has BURST measuring mode that captures data at all clock edges.
* SPI communications is only supported by LE-3500 (V1.03 or later).
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Operating Instructions
After inserting the expansion board into an analyzer (LE-3500/LE-2500), connect the communication lines to measure, using the probe pod. Since 9 kinds of signal lines can be tested, you can measure various communications: SD, RD, RS, CS, SD_CLK, RD_CLK, external input, trigger input and trigger output. Moreover, you can set the polarity of data and the clock you wish to capture.
Monitoring
In the normal mode (USART),
you can make full use of the functions of an analyzer
such as the trigger function. Also, by setting the BURST
mode on the analyzer, you can measure communication system
(clock synchronous communication) which supplies the clock
at the time of only transmitting data. That makes it possible
to monitor communication that the old protocol analyzers
cannot measure. In addition, by setting the I2C
mode, you can test the I2C serial communications
including the start sequence and stop sequence. Since
the translation display is available in I2C,
you can efficiently analyze the sequences of Read and
Write.
<I2C
Measuring Result Screen>![]() |
<I2C
Translation Screen>![]() |
<SPI Measuring Result Screen>![]() |
<SPI Frame Display Screen>![]() |
Logic Analyzer
By using the logic analyzer function, you can check the data logic and the timing of capturing the clock in the waveform. Especially, the serial interface between LSI often can be a problem regarding the phase difference and the delay of the clock and data. In this case, the logic analyzer function enables you to analyze by bit timing.
Simulation / Bert
Excepting the BURST mode, using the simulation function enables you to enhance the efficiency of product development and the troubleshooting. In the I2C and SPI mode, you can simulate in both the master and the slave. Also, since the bit error rate test (BERT) is available in the normal mode (USART), you can easily test the transmission feature of the device, etc.Specification
| Analyzer | LE-2500, LE-3500 |
|---|---|
| Interface | RS-232C, TTL / CMOS (for I2C and SPI*2) |
| Probe Signal | SD (SDA/SDO) , RD (SDI) , RS (SS) , CS , EX IN , SD CLK (SCL/SCK) , RD CLK , Trigger IN , Trigger OUT (Length of lead:170mm) |
| Protocol | ASYNC, ASYNC-PPP, SYNC(BSC), HDLC(SDLC), BURST, I2C, SPI*1 |
| Test function | Monitor / Simulation / BERT*2 |
| Communication speed | ASYN, ASYNC-PPP, SYNC, BURST : 50bps - 2.048Mbps*3 HDLC : 50bps to 2.048Mbps*3 on standard, 115.2Kbps to 10Mbps*3 on using OPFW10G*4 SPI : 50bps to 2.048Mbps*5, 115.2Kbps to 10Mbps*5 on using OP-FW10G*6 I2C : max. 1Mbps (On simulation 50K, 100K, 200K, 384K, 417K, 1Mbps) |
| Signal level | Selectable from 5.0V/3.3V/2.5V/1.8V of power supply system |
| Input Impedance | 100KΩ( 0V ≤ Vin ≤ 5V) ( Acceptable input range : -1V to +7V) |
| Input Level Threshold | Setting of 5.0V High: Min 3.5V Low: Max 1.5V Setting of 3.3V High: Min 2.0V Low: Max 0.8V Setting of 2.5V High: Min 1.7V Low: Max 0.7V Setting of 1.8V High: Min 1.2V Low: Max 0.6V |
| Output circuit | The followings are selectable*7: OC(Open collector)with the pull-up resister of 680Ω, OC(Open collector)without pull-up resister, Push-pull output of CMOS |
| Output Level Voltage | High level : Min Selectable signal level - 0.4V Low level : Max 0.5V*8 |
| Size and Weight | Probe Pod body size : 78(W) × 92(D) × 22(H) Weight : about 100g Relay cable length : 800mm |
| Power | Supplied from the analyzer's body |
| Tenperature | Operation:0 to 40°C Strage:-10 to 50°C |
(*2) I2C BERT testing not supported.
(*3) Set from analyzers.



